The MPE TLO Concurrent Test team is driving a paradigm shift in manufacturing test through true test content concurrency to reduce product test time and increase quality.
The team is seeking for a highly motivated engineer and manager to join the team to work in the highly challenging product development environment across MPE's product portfolio.
In this position, the engineer will get the unique opportunity to lead engineers developing Concurrent Test Technologies (CTT) and SW solutions, silicon test concurrency experiments, product enabling, and DFT requirements/methodologies to widely deploy concurrent test.
The role involved mainly hands-on engineering activities while also managing the local CR team. The team will work with the CTT Core Team developers, MPE product teams, and design DFT teams to develop a deep understanding of the various test content types, the content mixes that are possible, and driving/supporting those with MPE product teams.
**Responsibilities of the engineers may include but are not limited to**:
- Developing concurrent test solutions involved with methodologies and tools/SW development covering both test content and test program aspects.
- Driving, guiding, and supporting sort and class teams with concurrent test enabling bringing major test time savings for Intel products.
- Partnering with the DFT team to ensure concurrency is fully supported and defining new methods for the future.
- Making concurrency mixes POR in the test program.
- Working with the module and test program teams to satisfy test requirements in a concurrent paradigm such as datalogging, fail flows, Vmin searches, power/thermal.
- Leading a new local CTT team in Costa Rica (2-3 engineers).
**Behavioral traits**:
- Excellent communication and customer support skills.
**Qualifications**:** Minimum qualifications,**
You must possess the below minimum qualifications to be initially considered for this position:
- 2+ years of experience leading engineering teams.
**5+ years of experience working with**:
- Silicon debug/enabling, and silicon characterization experience in the areas of Scan, Array, Functional, and IO test content.
- DFT (Design for Testing) hardware and testing methods.
- Programming in one or more of the following languages: C/C++, Perl, Python, Java, VB, etc.
- Advanced English level.
**Preferred qualifications,**
- Intel's high volume mfg. test flows including Sort and Class.
- Experience with Intel ATEs including HDMT/CMT.
Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.
**Inside this Business Group**:
Manufacturing and Product Engineering (MPE) is responsible for test development across product segments, supporting 95% of Intel's revenue. We deliver comprehensive pre-production test suites and component/physical debug capabilities to enable high quality, high volume manufacturing.
**Posting Statement**:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
**Benefits**:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.
**Working Model**:
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. **In certain circumstances the work model may change to accommodate business needs.**
JobType
Hybrid