Silicon Packaging Architect

Silicon Packaging Architect
Empresa:

Intel


Detalles de la oferta

In this position, you will be part of the Network and Edge (NEX) group, working in the Platform Hardware Engineering (PHE) team. PHE is the central engineering pillar for NEX, enabling Hardware and Package solutions across Xeon, Core, Entry and Graphics segments.

As a Package Architect, your responsibilities will include but not be limited to the following:

- Responsible to lead a multi-discipline team of package support functions (NEX, ATTD, QnR, etc.), facilitating collaboration and cultivating influence across these organizations to ensure delivery of best-in-class products.
- Responsible for development of AI packages for Edge Devices and Discrete Graphic segments.
- Translates product requirements into package architecture specification, drives end-to-end package solutions for physical, electrical, and cost requirements.
- Leads technology tradeoff decisions ensuring silicon packages conform to electrical, mechanical, thermal, and reliability standards, specifications, and landing zones.
- Collaborates with silicon, hardware, and package leads to ensure high quality package output and aids in removing roadblocks.
- Oversees end-to-end package development process, including design, processes, and procedures and continuously improves packaging quality standards and targets from initial concept through product release.
- Applies expertise in package design troubleshooting, resolves new and existing packaging problems involving designs, materials, and processes and provides innovative and cost-effective solutions.
- Collaborates with manufacturing team to ensure the packaging design and tape out seamlessly transition to production.
- Work closely with division partners and corresponding groups to define substrate technology requirements to meet the next generation product performance while achieving low-cost solutions with a focus on optimizing overall system quality.
- Alignment to NEX competitive teardowns to vet Intel direction against competition.
- Collaborate with ATTD to stay fluent with Intel's package architecture roadmap (EMIB, Foveros, etc.).
- Aid the team to refine NEX's package methodologies and KPIs.
- Present to all levels of an organization including senior management.
- Handle high degrees of task and deadline pressure across a multi-geo team.
- Comfortable with a high degree of ambiguity.
- Willing and able to manage multiple priorities and activities simultaneously.
- A desire to continuously learn and grow.
- Insightful with a strong collaborative attitude.
- Strategic thinker with highly developed analytical and critical thinking abilities.
- Organized and efficient.
- Independent / proactive work style.
- Exceptional presentation skills, written and oral communication skills, and ability to synthesize complex information into clear messages.
- Strong interpersonal and relationship building skills with demonstrated expertise getting results across multiple groups and disciplines.
- Excellent business partnership and influencing skills.
- Role model of Intel culture and values.

**Qualifications**:
Minimum Qualifications
- Bachelor's degree in Electrical Engineering, Computer Engineering or Mechanical Engineering, or other STEM related degrees.
- 5+ years of experience with substrate package design or similar experience.

Preferred Qualifications

Experience with:

- Package QnR (quality and reliability) and use conditions.
- Various phases of platform hardware development - Hardware Engineering, Signal / Power Integrity and Board Layout.
- Intel's Core product line.
- Experience using Mentor and Cadence tools.

**Inside this Business Group**:
The Network & Edge Group brings together our network connectivity and edge into a business unit chartered to drive technology end to end product leadership. It's leadership Ethernet, Switch, IPU, Photonics, Network and Edge portfolio is comprised of leadership products critically important to our customers.

**Posting Statement**:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

**Benefits**:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.

**Working Model**:
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. **In certain circumstances the work model may change to accommodate business needs.**
JobType

Hybrid


Fuente: Whatjobs_Ppc

Requisitos

Silicon Packaging Architect
Empresa:

Intel


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