The primary responsibilities for this role can include, but are not limited to:
- Directs and manages a team of physical design engineers responsible for the physical design implementation of a chip design, subsystem, or block including clocking, timing, and integration.
- Provides guidance on physical design implementation and analyzes layout designs, power delivery, place, route, clock tree synthesis, and other aspects of physical design.
- Manages development of complex layout integrated circuit designs, simulation designs, RTL to GDS, logic synthesis, and oversees documentation for SoC development.
- Reviews circuit layouts architectures and prototypes, ensures issue resolution, and optimizes circuit output.
- Oversees physical design verification flow at block and chip level and makes recommendations to fix violations for current and future product architecture.
- Ensures schedule and landing zone requirements of the block, subsystem, or SoC are met.
- Drives results by inspiring people, role modeling Intel values, developing the capabilities of others, and ensuring a productive work environment.
**Qualifications**:
Minimum Qualifications:
Minimum qualifications are required to be initially considered for this position.
- Bachelor of Engineering degree or a Master of Science degree in Electronic, Electrical or Computer Engineering, or equivalent
- At least 3 years of experience as Team Manager and building a Team
- 5+ years in SOC, CPU or other silicon physical design environment
- Ability to communicate well with counterparts and key stakeholders including cross-site partners.
- Advanced English level
- Costa Rican unrestricted work permit.
Preferred Qualifications:
- Physical design experience with 14nm technology or newer
- 10+ years in SOC, CPU or other silicon physical design environment
**Inside this Business Group**:
The Network & Edge Group brings together our network connectivity and edge into a business unit chartered to drive technology end to end product leadership. It's leadership Ethernet, Switch, IPU, Photonics, Network and Edge portfolio is comprised of leadership products critically important to our customers.
**Posting Statement**:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
**Benefits**:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.
**Working Model**:
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. **In certain circumstances the work model may change to accommodate business needs.**
JobType
Hybrid
