Job DescriptionDevelops the logic design, register transfer level (RTL) coding, and simulation for an IP required to generate cell libraries, functional units, IP blocks, and subsystems for integration in full chip designs.Participates in the definition of architecture and microarchitecture features of the block being designed.Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation.Reviews the verification plan and implementation to ensure design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features.Supports SoC customers to ensure highquality integration and verification of the IP block.Drives quality assurance compliance for smooth IPSoC handoff.QualificationsMinimum Qualifications:The candidate must possess a minimum of bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent.-0-2 years of relevant logic design/pre-silicon verification experience with multiple project cycles.-Advanced English level- Costa Rican unrestricted work permit.-0-2 years of logic design/pre-silicon verification experience with various tools and methodologies including but not limited to:System VerilogRTL simulatorsVLSI or Structural and Physical design flow/methodology experience.Preferred Qualifications:Testbench developmentWork experience with system Verilog or OVM or UVM or Object-Oriented Programming (OOP)Formal Equivalence TestingRTL model buildPower-aware simulationCoverage-based random constraint simulationCapable in developing testplans, tests and verification environment based on High Level Architecture specifications.Power management, IOSF, AHB, PCI express or any industry standard BUS protocol experience a plusOVM / UVMScripting (Python/Perl/Shell)Interactive debuggerInside this Business GroupIn the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intels products.From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moores Law and groundbreaking innovations.DEG is Intels engineering group, supplying silicon to business units as well as other engineering teams.As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.Posting StatementAll qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.BenefitsWe offer a total compensation package that ranks among the best in the industry.It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation.Find more information about all of our Amazing Benefits here.Working ModelThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.In certain circumstances the work model may change to accommodate business needs.
