Asic Design Engineer

Asic Design Engineer
Empresa:

Cornelis Networks


Detalles de la oferta

**No 3rd Party Agency Submittals Please**

***This role may work remote from Costa Rica via an EOR (Employer of Record). Must meet the minimum requirements to be considered.**

Cornelis Networks is a well-funded, fast-growing start-up technology leader delivering purpose-built, high-performance fabrics accelerating High Performance Computing, High Performance Data Analytics, and Artificial Intelligence workloads in the Cloud and in the Data Center.

Operating on a global scale, Cornelis Networks provides comprehensive end-to-end interconnect solutions. This is made possible through a well-established network of server Original Equipment Manufacturers (OEM) and channel partners. With unwavering commitment, we are dedicated to driving innovation and facilitating breakthroughs that redefine the boundaries of what is achievable in the realm of high-performance computing.

We are hiring talented ASIC Design Engineers with deep experience in one or more of the key areas required to build the world-class SoCs to be deployed in high performance computing, high performance data analytics, and artificial intelligence interconnect solutions.

**Key Responsibilities**
- End-to-end SoC/ASIC development:

- Front-end standard cell ASIC development including RTL development, Design Verification, synthesis, and post-silicon validation.
- Cross-functional collaboration and partnering with internal and external cross-functional teams, across all levels of the corporation.
- Define, implement, debug, and deliver system solutions around purpose-built ASICs.

**Minimum Qualifications**
- 3 + years' post-college experience with silicon development
- 3 + years' post-college experience in digital design with one or more HDL language (System Verilog, Verilog, VHDL)
- 3 + years' post-college experience in one or more scripting language (TCL, Python, Perl)
- Understanding of Standard Cell ASIC development flow including digital design, IP integration, simulation and synthesis.
- B.S. or M.S. degree in Computer Engineering, Computer Science, or Electrical Engineering

**Preferred Qualifications**
- Track record of first-pass success in ASIC and Systems
- Experience with multiple clock designs and asynchronous interfaces

**Location**

This role may work remote from Costa Rica via an EOR (Employer of Record).

Cornelis Networks is an equal opportunity employer, and all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity or expression, pregnancy, age, national origin, disability status, genetic information, protected veteran status, or any other characteristic protected by law.

**Cornelis Networks does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services.**

Location
- San Jose, San Jose (Remote)
- Department
- ASIC Engineering
- Employment Type
- Full-Time
- Minimum Experience
- Experienced


Fuente: Whatjobs_Ppc

Requisitos

Asic Design Engineer
Empresa:

Cornelis Networks


Ingeniero Civil O Construcción

Graduado de Licenciatura en Ingeniería Civil o Construcción. - Experiência mínima de 2 años. - Capacidad de supervisión de obra, control de avance y presupue...


Desde Grupo Selvatura - San José

Publicado a month ago

Ingeniero Back End

Descripción del Puesto Como ingeniero senior de desarrollo frontend, serás responsable de diseñar, desarrollar y mantener interfaces frontend de alta calida...


Desde Moon Hi - San José

Publicado a month ago

Auxiliar Vindi Coronado

Cumplir con las diferentes etapas del proceso productivo para la elaboración de las recetas de los distintos panes, postres y repostería. También debe colabo...


Desde Auto Mercado - San José

Publicado a month ago

Intermediate Engineer I

**DUTIES AND RESPONSIBILITIES**: - Read and interpret process drawings (PFD, P&ID). - Perform and Lead engineering activities related to Distributed Control...


Desde Emerson - San José

Publicado a month ago

Built at: 2024-09-29T04:28:24.965Z